Přílohy: Description.docx; Mute circuit.jpg;
PLL mute.JPG; PLL_49,152MHz diagram.pdf
I have made a mute for the DF9NP PLL.
This prevent to ruin the performance of the IC9700 while the PLL is in no lock state.
See the attached description and pictures.
Are you able to put this on the website? If so, can you please announce that on moonnet?
Dieter DF9NP agreed on it.
73, Peter PA2V